MC100E431 查看數據表（PDF） - ON Semiconductor
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MC100E431 Datasheet PDF : 9 Pages
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MC10E431, MC100E431
VBB CLK2 CLK2 D2 D2 R2 S2
25 24 23 22 21 20 19
CLK1 26
18 Q2
CLK1 27
17 Q2
R1 28
16 VCC
VEE 1
S1 2
D1 3
MC10E431/MC100E431
15 Q1
14 Q1
13 Q0
D1 4
12 Q0
5 6 7 8 9 10 11
CLK0 CLK0 D0 D0 R0 S0 VCCO
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VCCO, and VEE pins must be externally con-
nected to Power Supply to guarantee proper operation.
Figure 1. Pinout: PLCC−28 (Top View)
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D[0:2], D[0:2]
ECL Differential Data Inputs
CLK[0:2], CLK[0:2] ECL Differential Clock
S[0:2]
ECL Edge Triggered Set Inputs
R[0:2]
ECL Edge Triggered Reset Input
Q[0:2], Q[0:2]
ECL Differential Data Outputs
VBB
VCC, VCCO
VEE
Reference Voltage Output
Positive Supply
Negative Supply
S0
D0
D0
D
S
Q
Q0
CLK0
CLK0
R0
S1
D1
D1
Q
Q0
R
D SQ
Q1
CLK1
CLK1
R1
S2
D2
D2
Q
Q1
R
D
S
Q
Q2
CLK2
CLK2
R2
VBB
Q
Q2
R
Figure 2. Logic Diagram
Table 2. FUNCTION TABLE
Dn
CLKn
Rn
L
Z
L
H
Z
L
X
X
Z
X
X
L
Z = Low to high transition
X = Don’t Care
Sn
Qn
L
L
L
H
L
L
Z
H
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