MC10EP52, MC100EP52
D1
D2
CLK 3
D
Flip-Flop
8 VCC
7Q
6Q
Table 1. PIN DESCRIPTION
PIN
FUNCTION
CLK*, CLK*
D*, D*
ECL Clock Inputs
ECL Data Input
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
* Pins will default LOW when left open.
CLK 4
Table 2. TRUTH TABLE
5 VEE
D
CLK
Q
L
H
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
Z
L
Z
H
Z = LOW to HIGH Transition
Table 3. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
75 kW
N/A
> 4 kV
> 200 V
> 2 kV
Level 1
UL 94 V−0 @ 0.125 in
155 Devices
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2