2 Pin Connections
Table 13. Pin Function Description
Pin
Symbol/
Type
Equivalent Internal Circuit
1
GNDLNA
2
RFIN
1
2
RF in
3
Bias
LNA output
to balun
T/R
3
GNDLNA
1.7 mA
48 VCCLNA
48
VCC
6.8 pF
4
EPAEN
VCC
VCC
4
Sequence
Manager Control
or SPI Control
NOTE: VCC = VCCRF
Pin Connections
Description
GNDLNA, Negative supply
GNDLNA is the ground for the
LNA.
RFIN
RFIN is the RF input to the
LNA. The LNA is a bipolar
cascode design. The input is
the base of the common
emitter transistor. Minimum
external matching is required
to optimize the input return loss
and gain. The cascode output
drives the primary of an
on-chip balun single-ended.
GNDLNA, Negative supply
GNDLNA is the ground for the
LNA.
VCCLNA, Positive supply
VCCLNA is taken to the
incoming positive battery or
regulated dc voltage through a
low impedance trace on the
PCB. It is decoupled to
GNDLNA at the pin of the IC.
EPAEN
External PA enable is a digital
output which can be used to
enable an external PA. It can
be controlled via SPI or placed
under sequence manager
control. This output can also be
used to control an external T/R
switch requiring
complementary drive.
MOTOROLA
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