PC13180FC 查看數據表（PDF） - Motorola => Freescale

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PC13180FC

LOW POWER DC - 1.8 GHz LNA / MIXER and VCO

Motorola => Freescale 

Functional Description

4.19 Main Loop Bandwidth

During a transmit cycle, Narrow Bandwidth Enable (R2/12) must be set to a logic one. During a receive

cycle this bit must be set to a logic zero. Changing the loop bandwidth of the Main Loop Filter in this

manner maximizes radio performance. Note that this bit is externally gated by the sequence manager.

Table 14. Data Direction and Signal Description for the MC13180 Baseband Interface

Pin Name

RFDATA

FS

RTXEN

CLK

RX Direction

MC13180 → Baseband

MC13180 → Baseband

MC13180 ← Baseband

MC13180 → Baseband

RX Mode Description

RX data

Start of each 6-bit sample

Receive mode enable

Data sample clock

Pin Name

RFDATA

FS

RTXEN

CLK

TX Direction

MC13180 ← Baseband

MC13180 → Baseband

MC13180 ← Baseband

MC13180 → Baseband

TX Mode Description

TX data

Signal is unused and remains low

Transmit mode enable

Data sample clock

28

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