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MC34700EP 查看數據表(PDF) - Freescale Semiconductor

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MC34700EP Datasheet PDF : 28 Pages
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FUNCTIONAL DEVICE OPERATION
DESIGN AND COMPONENT GUIDELINES
important. See Figure 23. These loops, and their associated
components, should be placed in such a way as to minimize
the loop size to prevent coupling to other parts of the circuit.
Also, the current carrying power traces and their associated
return traces should run adjacent to one another, to minimize
the amount of noise coupling. If sensitive traces must cross
the current carrying traces, they should be made
perpendicular to one another to reduce field interaction.
Second, small signal components which connect to
sensitive nodes need consideration. The critical small signal
components are the ones associated with the feedback
circuit. The high impedance input of the error amp is
especially sensitive to noise, and the feedback and
compensation components should be placed as far from the
switch node, and as close to the input of the error amplifier as
possible. Other critical small signal components include the
bypass capacitors for VIN, VGREG, and VDDI. Locate the
bypass capacitors as close to the pin as possible.
VIN1
HS
SW1
SD
Loop Curr ent
HS ON
Loop
Current
SD ON
The use of a multi-layer printed circuit board is
recommended. Dedicate one layer, usually the layer under
the top layer, as a ground plane. Make all critical component
ground connections with vias to this layer. Make sure that the
power grounds, GND2 and GND3, are connected directly to
the ground plane and not routed through the thermal pad or
analog ground. Dedicate another layer as a power plane and
split this plane into local areas for common voltage nets.
The IC input supply (VIN) should be connected through an
RC filter to the 9.0 to 18 V input supply, to prevent noise from
Buck Regulator 1’s power input (VIN1) from injecting
switching noise into the analog circuitry. If possible, further
isolation can be made by routing a dedicated trace for VIN,
and a separate trace for VIN1.
In order to effectively transfer heat from the top layer to the
ground plane and other layers of the printed circuit board,
thermal vias need to be used in the thermal pad design. It is
recommended that 5 to 9 vias be spaced evenly and have a
finished diameter of 0.3 mm.
VIN2 and 3
HS
SW2 and 3
LS
GND2 and 3
Loop Curr ent
HS ON
Loop
Current
LS ON
BUCK
CONVERTER 1
BUCK CONVERTER
2 and 3
Figure 23. Current Loops
COMPONENT SELECTION
Setting the Output Voltage
For all the regulators, the feedback resistor divider sets the
output voltage. See Figure 24 for the feedback and
compensation components referred to in the equations. For
the buck regulators, choose a value of about 20 K for the
upper resistor, and calculate the lower resistor using the
following equations:
RBOT
= RTOP ×VREF
VOUT VREF
VOUT
=
VREF
⎜⎜⎝⎛
RTOP
RBOT
+ 1⎟⎟⎠⎞
where, VREF = 0.7 V
For the LDO regulator choose a value of about 10 K for the
lower resistor, and calculate the upper resistor using the
following equations:
RTOP
=
RBOT
⎜⎜⎝⎛
VOUT
VREF
1⎟⎟⎠⎞
VOUT
=
VREF
⎜⎜⎝⎛
RTOP
RBOT
+ 1⎟⎟⎠⎞
where, VREF = 0.7 V
Choose the closest standard resistance values, check the
output voltage by using the equations above, and adjust the
values if necessary.
Setting the Enable for Cascade Sequencing
For the cascaded startup sequence shown in Figure 22,
the resistor divider sets the output voltage level where the
Analog Integrated Circuit Device Data
Freescale Semiconductor
34700
17

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