MCF51JF128VHS 查看數據表（PDF） - Freescale Semiconductor

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MCF51JF128VHS

Embedded - Microcontrollers

Freescale Semiconductor 

Peripheral operating requirements and behaviors

5.4.2 Thermal attributes

Board type Symbol

Description

64 LQFP 48 LQFP

44

32 QFN Unit Notes

Laminate

QFN

Single-layer RθJA

Thermal resistance, junction to

73

79

108

98

°C/W 1

(1s)

ambient (natural convection)

Four-layer RθJA

Thermal resistance, junction to

54

55

69

(2s2p)

ambient (natural convection)

33

°C/W 1

Single-layer RθJMA

Thermal resistance, junction to

61

66

91

(1s)

ambient (200 ft./min. air speed)

81

°C/W 1

Four-layer RθJMA

Thermal resistance, junction to

48

48

63

(2s2p)

ambient (200 ft./min. air speed)

28

°C/W 1

—

RθJB

Thermal resistance, junction to

37

34

44

13

°C/W 2

board

—

RθJC

Thermal resistance, junction to case 20

20

31

2.2

°C/W 3

—

ΨJT

Thermal characterization

5.0

4.0

6.0

6.0

°C/W 4

parameter, junction to package top

outside center (natural convection)

1. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions

—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method

Environmental Conditions—Forced Convection (Moving Air).

2. Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental Conditions

—Junction-to-Board.

3. Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate

temperature used for the case temperature. The value includes the thermal resistance of the interface material between

the top of the package and the cold plate.

4. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions

—Natural Convection (Still Air).

6 Peripheral operating requirements and behaviors

6.1 Core modules

6.1.1 Debug specifications

Table 12. Background debug mode (BDM) timing

Number

1

2

Symbol

tMSSU

tMSH

Description

BKGD/MS setup time after issuing background

debug force reset to enter user mode or BDM

BKGD/MS hold time after issuing background

debug force reset to enter user mode or BDM1

Min.

500

100

Max.

—

—

Unit

ns

µs

MCF51JF128 Data Sheet, Rev. 6, 01/2012.

Freescale Semiconductor, Inc.

21

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