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MCF5212CAE66 查看數據表(PDF) - Freescale Semiconductor

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产品描述 (功能)
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MCF5212CAE66
Freescale
Freescale Semiconductor Freescale
MCF5212CAE66 Datasheet PDF : 56 Pages
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MCF5213 Family Configurations
1.2 Reset Signals
Table 4 describes signals used to reset the chip or as a reset indication.
Table 4. Reset Signals
Signal Name
Reset In
Reset Out
Abbreviation
Function
I/O
RSTI
RSTO
Primary reset input to the device. Asserting RSTI for at least 8 CPU I
clock cycles immediately resets the CPU and peripherals.
Driven low for 1024 CPU clocks after the reset source has deasserted. O
1.3 PLL and Clock Signals
Table 5 describes signals used to support the on-chip clock generation circuitry.
Table 5. PLL and Clock Signals
Signal Name
External Clock In
Crystal
Clock Out
Abbreviation
Function
I/O
EXTAL Crystal oscillator or external clock input except when the on-chip
I
relaxation oscillator is used.
XTAL
Crystal oscillator output except when CLKMOD1=1, then sampled as O
part of the clock mode selection mechanism.
CLKOUT This output signal reflects the internal system clock.
O
1.4 Mode Selection
Table 6 describes signals used in mode selection; Table 7 describes the particular clocking modes.
Table 6. Mode Selection Signals
Signal Name
Abbreviation
Function
I/O
Clock Mode Selection CLKMOD[1:0] Selects the clock boot mode.
I
Reset Configuration
RCON
The Serial Flash Programming mode is entered by asserting the
RCON pin (with the TEST pin negated) as the chip comes out of
reset. During this mode, the EzPort has access to the flash memory
which can be programmed from an external device.
Test
TEST
Reserved for factory testing only and in normal modes of operation I
should be connected to VSS to prevent unintentional activation of
test functions.
CLKMOD[1:0]
00
00
01
10
10
11
Table 7. Clocking Modes
XTAL
0
1
N/A
0
1
N/A
Configure the clock mode.
PLL disabled, clock driven by external oscillator
PLL disabled, clock driven by on-chip oscillator
PLL disabled, clock driven by crystal
PLL in normal mode, clock driven by external oscillator
PLL in normal mode, clock driven by on-chip oscillator
PLL in normal mode, clock driven by crystal
MCF5213 ColdFire Microcontroller, Rev. 3
20
Freescale Semiconductor

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