8.4 DC Electrical Specifications
Preliminary Electrical Characteristics
Table 10. DC Electrical Specifications1
Characteristic
Symbol
Min
Max
Unit
Core Supply Voltage
I/O Pad Supply Voltage
SSTL I/O Pad Supply Voltage
SSTL I/O Pad Supply Voltage
SSTL Memory pads reference voltage (SD VDD = 2.5V)
SSTL Memory pads reference voltage (SD VDD = 3.3V)
Input High Voltage 3.3V I/O Pads
Input Low Voltage 3.3V I/O Pads
Output High Voltage 3.3V I/O Pads
IOH = –2.0 mA
Output Low Voltage 3.3V I/O Pads
IOL = 2.0mA
Input Hysteresis 3.3V I/O Pads
Input High Voltage SSTL 3.3V/2.5V3
Input Low Voltage SSTL 3.3V/2.5V3
Output High Voltage SSTL 3.3V/2.5V4
IOH = –5.0 mA
Output Low Voltage SSTL 3.3V/2.5V4
IOL = 5.0 mA
Input Leakage Current
Vin = VDD or VSS, Input-only pins
High Impedance (Off-State) Leakage Current
Vin = VDD or VSS, All input/output and output pins
Weak Internal Pull Up Device Current, tested at VIL Max.5
Input Capacitance 6
All input-only pins
All input/output (three-state) pins
Load Capacitance7
Low Drive Strength
High Drive Strength
Core Operating Supply Current 8
Master Mode
WAIT
DOZE
STOP
VDD
1.4
1.6
V
OVDD
3.0
3.6
V
SDVDD
2.3
2.7
V
SDVDD
3.0
3.6
V
VREF
0.5 SD VDD
—2
V
VREF
0.45 SD VDD
—2
V
VIH
0.7 x OVDD
3.6
V
VIL
VSS – 0.3
0.35 x OVDD
V
VOH
OVDD - 0.5
—
V
VOL
—
0.5
V
VHYS
0.06 x VDD
—
mV
VIH
VREF + 0.3 SDVDD + 0.3 V
VIL
VSS - 0.3
VREF - 0.3
V
VOH SDVDD - 0.25V
—
V
VOL
—
0.35
V
Iin
-1.0
1.0
µA
IOZ
-1.0
1.0
µA
IAPU
-10
Cin
—
—
CL
IDD
—
—
—
—
-130
µA
pF
7
7
pF
25
50
175
mA
15
mA
10
mA
100
µA
I/O Pad Operating Supply Current
Master Mode
Low Power Modes
DC Injection Current 3, 9, 10, 11
VNEGCLAMP =VSS– 0.3 V, VPOSCLAMP = VDD + 0.3
Single Pin Limit
Total MCU Limit, Includes sum of all stressed pins
OIDD
—
—
IIC
-1.0
-10
250
mA
250
µA
mA
1.0
10
1 Refer to Table 11 for additional PLL specifications.
2 VREF is specified as a nominal value only instead of a range, so no maximum value is listed.
3 This specification is guaranteed by design and is not 100% tested.
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 2
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
21