DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MT16VDDF12864HY-335 查看數據表(PDF) - Micron Technology

零件编号
产品描述 (功能)
生产厂家
MT16VDDF12864HY-335
Micron
Micron Technology Micron
MT16VDDF12864HY-335 Datasheet PDF : 31 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
512MB, 1GB (x64)
200-PIN DDR SODIMM
Table 12: IDD Specifications and Conditions – 512MB
Notes: 1–5, 8, 10, 12, 48; DDR SDRAM devices only; notes appear on pages 20–23; 0°C £ TA £ +70°C; VDD, VDDQ = +2.5V ±0.2V
MAX
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-
Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM and
DQS inputs changing once per clock cycle; Address and
control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active-Read-
Precharge; Burst = 4; tRC = tRC (MIN); tCK = tCK (MIN);
IOUT = 0mA; Address and control inputs changing once
per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All
device banks idle; Power-down mode; tCK = tCK (MIN);
CKE = (LOW)
IDLE STANDBY CURRENT: CS# = HIGH; All device banks
are idle; tCK = tCK (MIN); CKE = HIGH; Address and other
control inputs changing once per clock cycle. VIN = VREF
for DQ, DQS, and DM
ACTIVE POWER-DOWN STANDBY CURRENT: One device
bank active; Power-down mode; tCK = tCK (MIN);
CKE = LOW
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH;
One device bank active; tRC = tRAS (MAX); tCK = tCK
(MIN); DQ, DM and DQS inputs changing twice per clock
cycle; Address and other control inputs changing once per
clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous
burst; One device bank active; Address and control inputs
changing once per clock cycle; tCK = tCK (MIN); IOUT =
0mA
OPERATING CURRENT: Burst = 2; Writes; Continuous
burst; One device bank active; Address and control
inputs changing once per clock cycle; tCK = tCK (MIN); DQ,
DM, and DQS inputs changing twice per clock cycle
AUTO REFRESH BURST CURRENT:
tRC = tRFC
(MIN) tRFC =
7.8125µs
SELF REFRESH CURRENT: CKE £ 0.2V
OPERATING CURRENT: Four device bank interleaving
READs (Burst = 4) with auto precharge, tRC = minimum
tRC allowed; tCK = tCK (MIN); Address and control inputs
change only during Active READ, or WRITE commands
SYM
IDD0a
IDD1a
IDD2Pb
IDD2Fb
IDD3Pb
IDD3Nb
IDD4Ra
IDD4Wa
IDD5b
IDD5A
b
IDD6b
IDD7a
-335
1,032
1,392
64
800
480
960
1,432
1,272
4,080
96
64
3,272
-262
1,032
-26A/-
265
872
-202
992
UNIT NOTE
S
S
mA 20, 42
1,312 1,192 1,272 mA 20, 42
64
64
64
mA 21, 28,
44
720
720
720 mA 45
400
400
480 mA 21, 28,
44
800
800
800 mA 41
1,232 1,232 1,432 mA 20, 42
1,112 1,122 1,552 mA 20
3,760
96
3,760
96
3,920
96
mA 20, 44
mA 24, 44
64
2,832
64
2,832
64
2,952
mA 9
mA 20, 43
NOTE:
a - Value calculated as one module rank in this operating condition, and all other module ranks in IDD2p (CKE LOW) mode.
b - Value calculated reflects all module ranks in this operating condition.
09005aef80a646bc
DDF16C64_128x64HG_B.fm - Rev. B 7/03 EN
14
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]