MVTX2803 查看數據表（PDF） - Zarlink Semiconductor Inc

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MVTX2803

Unmanaged 8-Port 1000 Mbps Ethernet Switch

Zarlink Semiconductor Inc 

MVTX2803

Data Sheet

3.0 Data Forwarding Protocol

3.1 Unicast Data Frame Forwarding

When a frame arrives, it is assigned a handle in memory by the Frame Control Buffer Manager (FCB Manager).

A FCB handle will always be available, because of advance buffer reservations.

The memory (ZBT-SRAM) interface is two 64-bit buses, connected to two ZBT-SRAM domains, A and B. The

Receive (RxDMA) is responsible for multiplexing the data and the address. On a port’s “turn,” the RxDMA will

move 8 bytes (or up to the end-of-frame) from the port’s associated Receive FIFO (RxFIFO) into memory

(Frame Data Buffer, or FDB).

Once an entire frame has been moved to the FDB, and a good end-of-frame (EOF) has been received, the Rx

interface makes a switch request. The RxDMA arbitrates among multiple switch requests.

The switch request consists of the first 64 bytes of a frame, containing the source and destination MAC

addresses of the frame. The search engine places a switch response in the switch response queue of the frame

engine when done. Among other information, the search engine will have resolved the destination port of the

frame and will have determined that the frame is unicast.

After processing the switch response, the Transmission Queue Manager (TxQ manager) of the frame engine is

responsible for notifying the destination port that it has a frame to forward. But first, the TxQ manager has to

decide whether or not to drop the frame, based on global FDB reservations and usage, as well as TxQ

occupancy at the destination. If the frame is not dropped, then the TxQ manager links the frame’s FCB to the

correct per-port-per-class TxQ. Unicast TxQ’s are linked lists of transmission jobs, represented by their

associated frames’ FCB’s. There is one linked list for each transmission class for each port. There are 8 classes

for each of the 8 Gigabit ports – a total of 32 unicast queues.

The TxQ manager is responsible for scheduling transmission among the queues representing different classes

for a port. When the port control module determines that there is room in the MAC Transmission FIFO (TxFIFO)

for another frame, it requests the handle of a new frame from the TxQ manager. The TxQ manager chooses

among the head-of-line (HOL) frames from the per-class queues for that port, using a Zarlink Semiconductor

scheduling algorithm.

At the transmit end, each of the 8 ports has time slots devoted solely to reading data from memory at the

address calculated by port control. The Transmission DMA (TxDMA) is responsible for multiplexing the data

and the address. On a port’s turn, the TxDMA will move 8 bytes (or up to the EOF) from memory into the port’s

associated TxFIFO. After reading the EOF, the port control requests a FCB release for that frame. The TxDMA

arbitrates among multiple buffer release requests.

The frame is transmitted from the TxFIFO to the line.

3.2 Multicast Data Frame Forwarding

After receiving the switch response, the TxQ manager has to make the dropping decision. A global decision to

drop can be made, based on global FDB utilization and reservations. If so, then the FCB is released and the

frame is dropped. In addition, a selective decision to drop can be made, based on the TxQ occupancy at some

subset of the multicast packet’s destinations. If so, then the frame is dropped at some destinations but not

others, and the FCB is not released.

If the frame is not dropped at a particular destination port, then the TxQ manager formats an entry in the

multicast queue for that port and class. Multicast queues are physical queues (unlike the linked lists for unicast

frames). There are 4 multicast queues for each of the 8 Gigabit ports. There is one multicast queue for every

two unicast classes.

During scheduling, the TxQ manager treats the unicast queue and the multicast queue of the same class as one

logical queue.

The port control requests a FCB release only after the EOF for the multicast frame has been read by all ports to

which the frame is destined.

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