MX844RTR 查看數據表（PDF） - IXYS CORPORATION

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MX844RTR

12 BIT, MULTI-CHANNEL POWER & TEMP SENSOR FOR MONITOR & CONTROL SYSTEMS

IXYS CORPORATION 

MX844

IXYS

Digital Comparator

Two 12-bit registers form a window comparator of the ADC output data. The value of comparator1 must

always be set to a value greater than comparator2. There are three cases to consider, depending on

whether the comparator values are above or below 800h:

1) If the value of comparator1 is greater than 800h and the value of comparator2 is less than 800h, then

CMP pulses when the ADC value is greater than or equal to comparator1, or less than or equal to

comparator2.

2) If the value of comparator1 is greater than 800h and the value of comparator2 is greater than 800h,

then CMP pulses when the ADC value is greater than or equal to comparator1, or less than comparator2.

3) If the value of comparator1 is less than 800h and the value of comparator2 is less than 800h, then

CMP pulses when the ADC value is greater than comparator1, or less than or equal to comparator2.

In all cases, CMP will go logic low at the same time as DRDY transitions low and CMP will return high

when the ADC_2 register is read or after 2048 *tAD (see the ADC timing diagram). The status of CMP is

also available in bit 6 of the ADC_1 register.

In a typical application CMP would cause a controller interrupt, at which time the controller reads the

actual ADC output that caused the interrupt (which clears the DRDY and CMP status bits) and takes

appropriate action. Another application would be to connect CMP to over-current or over-voltage

shutdown circuitry.

ASYNCHRONOUS OUTPUT

The ADC result is transmitted on pin AOUT in 8-bit, no parity asynchronous NRZ serial format. Two

characters of 8 bits each are transmitted for each ADC conversion, with a start bit just prior to the data

(see the figure below).

D0 D1 D2 D3 D4 D5 n0 n1

D6 D7 D8 D9 D10 D11 n2 cr7

D[11:0] is the 12-bit result of the ADC conversion. Bit cr7 is the value of the control register bit 7. Bits n2,

n1, n0 are automatically inserted which indicate the address of the serial EEPROM. These bits can be

used by the receiver to identify which channel and range are being transmitted. The EEPROM address is

reset to zero by the SYNC pin pulse. The "ANALOG/DIGITAL CONVERTER" section of this document

shows the timing of the asynchronous output bytes relative to the conversion cycle.

MX844

Drawing No. 084423

6

08/25/06

www.claremicronix.com

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