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NCP1255 查看數據表(PDF) - ON Semiconductor

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NCP1255 Datasheet PDF : 22 Pages
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NCP1255
40.0
20.0
N1 (Vout + Vf)
offtime
0
20.0
40.0
N2Vbulk
ontime
464u
472u
480u
time in seconds
488u
496u
Figure 5. The signal obtained on the auxiliary winding swings negative during the ontime.
Let’s assume we need to reduce the peak current from 2.5 A at low line, to 2 A at high line. This corresponds to a 20%
reduction or a set point voltage of 640 mV. To reach this level, then the negative voltage developed on the OPP pin must reach:
VOPP + 640 m * 800 m + 160 mV
(eq. 6)
RoppU
This point will
be adjusted to
reduce the ref
at hi line to the
desired level.
Vcc
aux
Vdd
swings to:
Vout during toff
NVin during ton
from FB
reset
OPP
Iopp
RoppL
K1 SUM2
ref
CS
K2
0.8 V
±5%
ref = 0.8 V + VOPP
(VOPP is negative)
Figure 6. The OPP circuitry affects the maximum peak current set point by
summing a negative voltage to the internal voltage reference.
Let us assume that we have the following converter
characteristics:
Vout = 19 V
Vin = 85 to 265 V rms
N1 = Np:Ns = 1:0.25
N2 = Np:Naux = 1:0.18
Given the turns ratio between the primary and the
auxiliary windings, the ontime voltage at high line
(265 Vac) on the auxiliary winding swings down to:
Vaux + N2Vin,max + 0.18 375 + 67.5 V (eq. 7)
To obtain a level as imposed by Equation 6, we need to
install a divider featuring the following ratio:
Div
+
0.16
67.5
[
2.4
m
(eq. 8)
If we arbitrarily fix the pulldown resistor ROPPL to 1 kW,
then the upper resistor can be obtained by:
ROPPU
+
67.5 * 0.16
0.16ń1 k
[
421
kW
(eq. 9)
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