NJU26123V 查看數據表（PDF） - Japan Radio Corporation

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NJU26123V

Digital Signal Processor for TV

Japan Radio Corporation  

NJU26123

■ Host Interface

The NJU26123 can be controlled via Serial Host Interface (SHI) using I2C bus. Data transfers are in 8 bit

packets (1 byte) when using either format. Refer to serial Host Interface Pin Description.(Table 12)

Table 12 Serial Host Interface Pin Description

Pin No.

16

Symbol

(I2C bus)

AD1

I2C bus Format

I2C bus address Bit

22

SDA

Serial Data Input/Output

(Open Drain Input/Output)

23

SCL

Serial Clock

Note : SDA pin (No.22) is a bi-directional open drain terminal. This pin requires a pull-up resister.

AD1 (No.16) pin is input pin with pull-down. AD1 (No.16) pin is connected with VDD or VSS through 3.3kΩ

resistance.

When NJU26123 is stopped by power supply VDD, SDA pin and SCL pin become Hi-Z. But these pins are not

5V tolerant when VDD stops.

■ I2C bus

I2C bus interface transfers data to the SDA pin and clocks data to the SCL pin. SDA pin is a bi-directional open

drain and requires a pull-up resister.

AD1 pin is used to configure the seven-bit SLAVE address of the serial host interface. (Table 13) This offers

additional flexibility to a system design by two different SLAVE addresses of the NJU26123. An address can be

arbitrarily set up by the AD1 pin. The I2C address of AD1 is decided by connection of AD1 pin.

Table 13 I2C bus SLAVE Address

AD1

R/W

bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

0

0

0

0

1

1

1

1

1

0

1

0

0

1

R/W

Start

bit

Slave Address ( 7bit )

R/W

bit

ACK

* SLAVE address is 0 when AD1 is “Low”. SLAVE address is 1 when AD1 is “High”.

* SLAVE address is 0 when R/W is “W”. SLAVE address is 1 when R/W is “R”.

Note : The serial host interface supports “Standard-Mode (100kbps)” and “Fast-Mode (400kbps)” I2C bus data

transfer.

Ver.2008-04-17

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