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NJU8713V 查看數據表(PDF) - Japan Radio Corporation

零件编号
产品描述 (功能)
生产厂家
NJU8713V
JRC
Japan Radio Corporation  JRC
NJU8713V Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
NJU38575153
FUNCTIONAL DESCRIPTION
(1) Signal Output
PWM signals of L channel and R output from OUT1 and OUT2 terminals respectively. These signals are
converted to analog signal by external 2nd-order or over LC filter. The output driver power supplied from VDDO
and VSSO are required high response power supply against voltage fluctuation like as switching regulator
because Output T.H.D is effected by power supply stability.
(2) Master Clock
Master clock (MCK) synchronizes the Audio signal inputs (IN1 and IN2). The setup time and the hold time
should be kept in the AC characteristics because IN1 and IN2 are fetched with the rising edge of MCK. MCK
requires jitter-free or jitter as small as possible because the jitter downs S/N ratio.
OUT1 and OUT2 occur the pop noise when MCK is stopped in operation without standby mode. Therefore,
the standby mode should be set before MCK stop.
(3) Output Control
Output circuit is selected by the conditions of EN1 and EN2 terminals.
EN2
EN1
Output State of OUT1 & OUT2
0
0
Standby(High impedance)
0
1
Audio Signal Output
1
0
BPZ Output
1
1
Beep Signal Output
(4) Beep Function
The beep signal must be input before the rising edge of EN2 signal and must be stopped after the falling edge
of EN2 signal.
EN1
EN2
MCK
BEEP
Audio Signal Output
Beep Signal Output
Audio Signal Output
Ver.2004-06-02
-3-

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