IC61SF51218T 查看數據表（PDF） - Integrated Circuit Solution Inc

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IC61SF51218T

256K x 32, 256K x 36, 512K x 18 8Mb SYNCBURST Flow throughSRAMs

Integrated Circuit Solution Inc 

IC61SF25632T/D IC61SF25636T/D

IC61SF51218T/D

CAPACITANCE (1,2)

Symbol

Parameter Conditions

Max.

Unit

CIN

Input Capacitance

VIN = 0V

6

pF

COUT

Input/Output Capacitance

VOUT = 0V

8

pF

Notes:

1. Tested initially and after any design or process changes that may affect these parameters.

2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.3V.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Level

Output Load

Unit

0V to 3.0V

1.5 ns

1.5V for 3.3V I/O

VCCQ/2V for 2.5V I/O

See Figures 1 and 2

AC TEST LOADS

ZO = 50Ω

Output

Buffer

50Ω

1.5V for 3,3V I/O

VCCQ/2V for 2.5V I/O

Figure 1

3.3V for 3.3V I/O

/2.5V for 2.5v I/O

OUTPUT

317Ω /1667Ω

5 pF

Including

jig and

scope

351Ω /1538Ω

Figure 2

Integrated Circuit Solution Inc.

13

SSR020-0A 9/03/2002

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