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P5CC081
IO1
PROGRAMMABLE
IO2
IO1, IO2, IO3
IO3
UART
ISO 7816
ROM
264 KB
PROGRAM
MEMORY
EEPROM
80 KB
DATA AND
PROGRAM
MEMORY
RAM
7680 B
DATA
MEMORY
MEMORY MANAGEMENT UNIT (MMU)
FameXE
ENHANCED PUBLIC
KEY
COPROCESSOR e.g.
RSA, ECC
CLK
CLOCK
FILTER
CLOCK
GENERATION
SECURE_MX51 CPU
RST_N
SECURITY SENSORS
RESET GENERATION
VOLTAGE REGULATOR
VDD
VSS
Fig 1. Functional diagram P5CC081
TIMERS
16-bit 16-bit
T0 T1
CRC16
FAST
RNG
TRIPLE-DES
COPROCESSOR
AES
COPROCESSOR
001aal385