PIC16LC72T-02E/JW 查看數據表（PDF） - Microchip Technology
零件编号
产品描述 (功能)
生产厂家
PIC16LC72T-02E/JW Datasheet PDF : 124 Pages
| |||
PIC16C72 Series
2.3 PCL and PCLATH
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13 bits
wide. The low byte is called the PCL register. This reg-
ister is readable and writable. The high byte is called
the PCH register. This register contains the PC<12:8>
bits and is not directly readable or writable. All updates
to the PCH register go through the PCLATH register.
Figure 2-9 shows the four situations for the loading of
the PC. Example 1 shows how the PC is loaded on a
write to PCL (PCLATH<4:0> → PCH). Example 2
shows how the PC is loaded during a GOTO instruction
(PCLATH<4:3> → PCH). Example 3 shows how the PC
is loaded during a CALL instruction (PCLATH<4:3> →
PCH), with the PC loaded (PUSHed) onto the Top of
Stack. Finally, example 4 shows how the PC is loaded
during one of the return instructions where the PC is
loaded (POPed) from the Top of Stack.
FIGURE 2-9: LOADING OF PC IN DIFFERENT SITUATIONS
Situation 1 - Instruction with PCL as destination
12
PC
PCH
PCL
87
PCLATH<4:0>
5
0
8
STACK (13-bits x 8)
Top of STACK
PCLATH
ALU result
Situation 2 - GOTO Instruction
PCH
PCL
12 11 10 8 7
0
PC
2 PCLATH<4:3>
11
Opcode <10:0>
STACK (13-bits x 8)
Top of STACK
PCLATH
Situation 3 - CALL Instruction
13
PCH
12 11 10
PC
87
2 PCLATH<4:3>
PCL
0
11
Opcode <10:0>
PCLATH
STACK (13-bits x 8)
Top of STACK
Situation 4 - RETURN, RETFIE, or RETLW Instruction
13
PCH
12 11 10
PC
87
PCL
0
11
Opcode <10:0>
PCLATH
STACK (13-bits x 8)
Top of STACK
Note: PCLATH is not updated with the contents of PCH.
© 1998 Microchip Technology Inc.
Preliminary
DS39016A-page 15
Share Link: 