PIC16LC72T-02E/SS 查看數據表（PDF） - Microchip Technology
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PIC16LC72T-02E/SS Datasheet PDF : 124 Pages
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PIC16C72 Series
2.3.1 STACK
The stack allows a combination of up to 8 program calls
and interrupts to occur. The stack contains the return
address from this branch in program execution.
Midrange devices have an 8 level deep x 13-bit wide
hardware stack. The stack space is not part of either
program or data space and the stack pointer is not
readable or writable. The PC is PUSHed onto the stack
when a CALL instruction is executed or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN, RETLW or a RETFIE instruction execution.
PCLATH is not modified when the stack is PUSHed or
POPed.
After the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on). An example of the overwriting of the stack is
shown in Figure 2-10.
FIGURE 2-10: STACK MODIFICATION
STACK
Push1 Push9
Push2 Push10
Push3
Push4
Push5
Push6
Push7
Push8
Top of STACK
2.4 Program Memory Paging
The CALL and GOTO instructions provide 11 bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction
the upper 2 bits of the address are provided by
PCLATH<4:3>. When doing a CALL or GOTO instruction,
the user must ensure that the page select bits are pro-
grammed so that the desired program memory page is
addressed. If a return from a CALL instruction (or inter-
rupt) is executed, the entire 13-bit PC is pushed onto
the stack. Therefore, manipulation of the
PCLATH<4:3> bits are not required for the return
instructions (which POPs the address from the stack).
Note:
PIC16C72 Series devices ignore paging
bit PCLATH<4>. The use of PCLATH<4>
as a general purpose read/write bit is not
recommended since this may affect
upward compatibility with future products.
DS39016A-page 16
Preliminary
© 1998 Microchip Technology Inc.
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