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PIC16LC72-02/JW 查看數據表(PDF) - Microchip Technology

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PIC16LC72-02/JW
Microchip
Microchip Technology Microchip
PIC16LC72-02/JW Datasheet PDF : 124 Pages
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PIC16C72 Series
2.5 Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer). This is indirect addressing.
EXAMPLE 2-1: INDIRECT ADDRESSING
• Register file 05 contains the value 10h
• Register file 06 contains the value 0Ah
• Load the value 05 into the FSR register
• A read of the INDF register will return the value of
10h
• Increment the value of the FSR register by one
(FSR = 06)
• A read of the INDR register now will return the
value of 0Ah.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
FIGURE 2-11: DIRECT/INDIRECT ADDRESSING
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-2.
EXAMPLE 2-2: HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
NEXT
CONTINUE
movlw
movwf
clrf
incf
btfss
goto
:
0x20 ;initialize pointer
FSR ; to RAM
INDF ;clear INDF register
FSR ;inc pointer
FSR,4 ;all done?
NEXT ;NO, clear next
;YES, continue
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-11. However, IRP is not used in the
PIC16C72 Series.
RP1:RP0
(2)
Direct Addressing
6
from opcode
0
bank select location select
00
00h
01
80h
10
100h
Indirect Addressing
IRP
7
(2)
FSR register
0
11
180h
bank select
location select
Data
Memory(1)
not used
(3)
(3)
7Fh
FFh
17Fh
1FFh
Bank 0 Bank 1 Bank 2 Bank 3
Note 1: For register file map detail see Figure 2-2.
2: Maintain RP1 and IRP as clear for upward compatibility with future products.
3: Not implemented.
© 1998 Microchip Technology Inc.
Preliminary
DS39016A-page 17

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