PIC16LC72T-02I/SO 查看數據表（PDF） - Microchip Technology

零件编号

产品描述 (功能)

生产厂家

PIC16LC72T-02I/SO

8-Bit CMOS microcontroller with A,D converter

Microchip Technology 

3.0 I/O PORTS

Some pins for these I/O ports are multiplexed with an

alternate function for the peripheral features on the

device. In general, when a peripheral is enabled, that

pin may not be used as a general purpose I/O pin.

Additional information on I/O ports may be found in the

PICmicro™ Mid-Range MCU Reference Manual,

DS33023.

3.1 PORTA and the TRISA Register

PORTA is a 6-bit wide bi-directional port. The corre-

sponding data direction register is TRISA. Setting a

TRISA bit (=1) will make the corresponding PORTA pin

an input, i.e., put the corresponding output driver in a

hi-impedance mode. Clearing a TRISA bit (=0) will

make the corresponding PORTA pin an output, i.e., put

the contents of the output latch on the selected pin.

Reading the PORTA register reads the status of the

pins whereas writing to it will write to the port latch. All

write operations are read-modify-write operations.

Therefore a write to a port implies that the port pins are

read, this value is modified, and then written to the port

data latch.

Pin RA4 is multiplexed with the Timer0 module clock

input to become the RA4/T0CKI pin. The RA4/T0CKI

pin is a Schmitt Trigger input and an open drain output.

All other RA port pins have TTL input levels and full

CMOS output drivers.

Other PORTA pins are multiplexed with analog inputs

and analog VREF input. The operation of each pin is

selected by clearing/setting the control bits in the

ADCON1 register (A/D Control Register1).

Note: On a Power-on Reset, these pins are con-

figured as analog inputs and read as '0'.

The TRISA register controls the direction of the RA

pins, even when they are being used as analog inputs.

The user must ensure the bits in the TRISA register are

maintained set when using them as analog inputs.

EXAMPLE 3-1: INITIALIZING PORTA

BCF STATUS, RP0 ;

CLRF PORTA

; Initialize PORTA by

; clearing output

; data latches

BSF STATUS, RP0 ; Select Bank 1

MOVLW 0xCF

; Value used to

; initialize data

; direction

MOVWF TRISA

; Set RA<3:0> as inputs

; RA<5:4> as outputs

; TRISA<7:6> are always

; read as '0'.

PIC16C72 Series

FIGURE 3-1: BLOCK DIAGRAM OF

RA3:RA0 AND RA5 PINS

Data

bus

WR

Port

D

Q

CK Q

Data Latch

D

Q

VDD

P

N

I/O pin(1)

WR

TRIS

CK Q

TRIS Latch

VSS

Analog

input

mode

RD TRIS

Q

D

TTL

input

buffer

EN

RD PORT

To A/D Converter

Note 1: I/O pins have protection diodes to VDD and

VSS.

FIGURE 3-2: BLOCK DIAGRAM OF RA4/

T0CKI PIN

Data

bus

WR

PORT

DQ

CK Q

Data Latch

N

I/O pin(1)

WR

TRIS

DQ

CK Q

TRIS Latch

VSS

Schmitt

Trigger

input

buffer

RD TRIS

QD

RD PORT

ENEN

TMR0 clock input

Note 1: I/O pin has protection diodes to VSS only.

© 1998 Microchip Technology Inc.

Preliminary

DS39016A-page 19

Share Link: