PCA8565 查看數據表（PDF） - NXP Semiconductors.

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PCA8565

4-bit multiplexed/1-bit latched 5-bit I2C EEPROM

NXP Semiconductors. 

NXP Semiconductors

PCA8565

Real time clock/calendar

9.2 Control registers

9.2.1 Register Control_1

Table 5. Register Control_1 (address 00h) bits description

Bit Symbol

Value Description

7

TEST1

0[1]

normal mode

1

EXT_CLK test mode

6

N

0[2]

default value

5

STOP

0[1]

RTC source clock runs

1

all RTC divider chain flip-flops are asynchronously set to

logic 0;

the RTC clock is stopped (CLKOUT at 32.768 kHz is still

available)

4

N

0[2]

default value

3

TESTC

0

power-on reset override facility is disabled;

set to logic 0 for normal operation

1[1]

power-on reset override may be enabled

2 to 0 N

000[2] default value

[1] Default value.

[2] Bits labeled as N should always be written with logic 0.

9.2.2 Register Control_2

Table 6. Register Control_2 (address 01h) bits description

Bit Symbol

Value Description

7 to 5 N

000[1] default value

4

TI_TP

0[2]

INT is active when TF is active (subject to the status of

TIE)

1

INT pulses active according to Table 26 (subject to the

status of TIE);

Remark: note that if AF and AIE are active then INT will

be permanently active

3

AF

0[2]

alarm flag inactive

1

alarm flag active

2

TF

0[2]

timer flag inactive

1

timer flag active

1

AIE

0[2]

alarm interrupt disabled

1

alarm interrupt enabled

0

TIE

0[2]

timer interrupt disabled

1

timer interrupt enabled

[1] Bits labeled as N should always be written with logic 0.

[2] Default value.

PCA8565_2

Product data sheet

Rev. 02 — 16 June 2009

© NXP B.V. 2009. All rights reserved.

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