Philips Semiconductors
4-bit I2C and SMBus I/O port
Objective data sheet
PCA9536
PROTOCOL
START
CONDITION
(S)
BIT 7
MSB
(A7)
t SU;STA
t LOW
t HIGH
BIT 6
(A6)
1 / f SCL
BIT 0
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(S)
SCL
t BUF
tr
tf
SDA
t HD;STA
t SU;DAT
t HD;DAT
t VD;DAT
t VD;ACK
Figure 11. I2C-bus timing diagram; rise and fall times refer to VIL and VIH
tSU;STO
SW02210
PULSE
GENERATOR
VI
RT
VDD
D.U.T.
RL = 500 Ω
VO
CL
50 pF
VDD
Open
DEFINITIONS
RL = Load resistor.
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to the output
impedance ZO of the pulse generators.
SW02181
Figure 12. Test circuitry for switching times
From Output
Under Test
CL = 50 pF
500 Ω
500 Ω
2VDD
S1
Open
GND
Load Circuit
TEST
tpv
S1
2 VDD
SA00652
Figure 13. Test circuit
2004 Aug 20
12