PCA9539R 查看數據表（PDF） - NXP Semiconductors.
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PCA9539R Datasheet PDF : 31 Pages
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NXP Semiconductors
PCA9539; PCA9539R
16-bit I2C-bus and SMBus low power I/O port with interrupt and reset
SDA
tBUF
SCL
tr
tLOW
tHD;STA
P
S
tHD;DAT
tf
tHIGH
tSU;DAT
Fig 19. Definition of timing on the I2C-bus
tHD;STA
tSP
tSU;STA
Sr
tSU;STO
P
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START
SCL
SDA
RESET 50 %
IOn
30 %
trec(rst)
Fig 20. Definition of RESET timing in PCA9539
ACK or read cycle
trst
50 %
tw(rst)
50 %
trst
50 %
after reset,
I/Os reconfigured
as inputs
002aad732
START
SCL
ACK or read cycle
SDA
30 %
RESET 50 %
IOn
trec(rst)
Fig 21. Definition of RESET timing in PCA9539R
trst
50 %
tw(rst)
50 %
trst
50 %
after reset, I/Os unchanged;
device state machine reset
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PCA9539_PCA9539R_5
Product data sheet
Rev. 05 — 28 July 2008
© NXP B.V. 2008. All rights reserved.
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