PCD5008 查看數據表（PDF） - Philips Electronics

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PCD5008

FLEX™ Pager Decoder

Philips Electronics 

Philips Semiconductors

FLEX™ Pager Decoder

Product specification

PCD5008

8.4 Configuration and synchronisation

8.4.1 GENERAL

After a reset, all configuration data has to be (re)loaded

into the PCD5008 by the host using the SPI. PCD5008

features which do not change during operation are

configured using the configuration packet (Section 8.4.4),

the receiver control packets (Section 8.5) and the address

configuration packets (Section 8.6). PCD5008 features

which can be changed during operation are configured

using the control packet. The checksum packet ensures

proper communication between the host and the

PCD5008.

8.4.2 SPI SECURITY ALGORITHM

The PCD5008 provides a security algorithm to verify

correct SPI operation (Figs 9 and 10). The PCD5008

maintains a checksum register equal to the result of

XORing the 24 data bits of every packet it receives, except

the checksum packet 00H and special packets

1CH to 1FH. When the PCD5008 is reset, the internal

checksum register is initialized to the 24 bit part ID defined

in the part ID packet.

Immediately following a reset and whenever the host

sends a packet other than a checksum packet, the

SPI output of status and data (SPI transmit) is disabled.

The PCD5008 then initiates SPI transfers continuously,

sending the part ID packet (Section 8.4.5). Note that when

SPI transmit is disabled all decoding and timing functions

are unaffected. The SPI transmit can be enabled by

sending a checksum packet for which the checksum value

matches the checksum register.

Any checksum packets sent when the SPI transmit is

enabled, are ignored by the PCD5008 irrespective of the

value of the checksum packet data bits. Thus when the

PCD5008 initiates an SPI transfer and the host has no

data to send, the host should send the checksum packet

so as not to disable the SPI transmit. The data in the

checksum packet could be a null packet (32 bit stream of

all zeros).

Sending a packet other than the checksum packet when

the SPI transmit is enabled causes the SPI transmit to be

disabled until a checksum packet is sent with the correct

value. Thus when the host re-configures the PCD5008

after a reset, the SPI transmit is disabled until the host

sends a checksum packet at the end of the configuration

data, with the checksum value equal to the result of

XORing together the data bits of each of the configuring

packets and the data bits of the part ID packet.

If the SPI transmit is enabled and there is data in the

transmit buffer, the PCD5008 initiates an SPI transfer

sending a packet from its transmit buffer. The PCD5008

sends the status packet (which is not buffered) when the

host initiates an SPI transfer and the transmit buffer is

empty.

handbook, full pagewidth

32

PART ID REGISTER

32 × 32 DATA PACKET 32

FIFO TRANSMIT

BUFFER

32

MUX

32

STATUS REGISTER

SPI TRANSMIT REGISTER

SPI

SECURITY

ALGORITHM

MISO

MGK261

Fig.9 SPI transmit functional block diagram.

1998 Jun 17

14

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