PCF8576U/5(2001) 查看數據表（PDF） - Philips Electronics

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PCF8576U/5
(Rev.:2001)

Universal LCD driver for low multiplex rates

Philips Electronics 

Philips Semiconductors

Universal LCD driver for low multiplex rates

Product specification

PCF8576

After acknowledgement, one or more command bytes (m)

follow which define the status of the addressed PCF8576s.

The last command byte is tagged with a cleared most

significant bit, the continuation bit C. The command bytes

are also acknowledged by all addressed PCF8576s on the

bus.

After the last command byte, a series of display data bytes

(n) may follow. These display bytes are stored in the

display RAM at the address specified by the data pointer

and the subaddress counter. Both data pointer and

subaddress counter are automatically updated and the

data is directed to the intended PCF8576 device. The

acknowledgement after each byte is made only by the (A0,

A1 and A2) addressed PCF8576. After the last display

byte, the I2C-bus master issues a STOP condition (P).

7.8 Command decoder

The command decoder identifies command bytes that

arrive on the I2C-bus. All available commands carry a

continuation bit C in their most significant bit position

(Fig.17). When this bit is set, it indicates that the next byte

of the transfer to arrive will also represent a command. If

this bit is reset, it indicates the last command byte of the

transfer. Further bytes will be regarded as display data.

The five commands available to the PCF8576 are defined

in Table 4.

SDA

SCL

data line

stable;

data valid

change

of data

allowed

MBA607

Fig.12 Bit transfer.

handbook, full pagewidth

SDA

SCL

S

START condition

SDA

SCL

P

STOP condition

MBC622

2001 Oct 02

Fig.13 Definition of START and STOP conditions.

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