DMC73CE167 查看數據表（PDF） - Daewoo Semiconductor
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DMC73CE167 Datasheet PDF : 90 Pages
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31
8Bit Single Chip Microcontroller
DMC73C167
Bit 6
Bit 7
of interrupt requested.
0 = INT3_0 and INT3_1 are not requested.
1 = INT3_0 or INT3_1 is pending
Should always be 0.
Should always be 0.
Table 5-13. P1 0101h IOCTL1 Interrupt Control 1
Bit
7
R
W
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4-7
6
5
Not used
4
3
2
1
0
INT5F INT5E INT4F INT4E
INT4CLR
INT5 GLOBAL
OSD
INT4E. OSD Interrupt (INT4) Enable.
0 = Disables OSD interrupt
1 = Enables OSD interrupt
INT4F. OSD Interrupt (INT4) Flag
0 = INT4 is not requested.
1 = INT4 is pending
INT4CLR. Clear OSD Interrupt (INT4) Flag
0= No effect
1 = Clears OSD interrupt INT4 flag
INT5E. Interrupt 5 Enable
This bit enables INT5_0, INT5_1, and INT5_2 interrupt requests.
0 = Disables Interrupt 5
1 = Enables Interrupt 5
INT5F. Interrupt5 Flag
Any interrupt request of INT5_0, INT5_1, or INT5_2 sets this bit to 1.
0 = INT5_0 and INT5_1 are not requested
1 = INT5_0 or INT5_1 is pending
Not used in this device.
Table 5-14. P2 0102h IOCTL2 Interrupt Control 2
Bit
7
R
W
Bit 0
6
5
4
Not used
3
2
1
INT3_0 INT1
EDGE EDGE
INT5_0 EDGE. External Interrupt INT5_0 Edge Selection.
0 = INT5_0 interrupt is triggered at falling edge.
1 = INT5_0 interrupt is triggered at rising edge.
0
INT5_0
EDGE
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