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PIC16LC72A-10E/SS 查看數據表(PDF) - Microchip Technology

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PIC16LC72A-10E/SS
Microchip
Microchip Technology Microchip
PIC16LC72A-10E/SS Datasheet PDF : 120 Pages
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PIC16C62B/72A
2.5 Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer).
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-1.
EXAMPLE 2-1: HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
NEXT
CONTINUE
movlw
movwf
clrf
incf
btfss
goto
:
0x20 ;initialize pointer
FSR ; to RAM
INDF ;clear INDF register
FSR ;inc pointer
FSR,4 ;all done?
NEXT ;NO, clear next
;YES, continue
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-3. However, IRP is not used in the
PIC16C62B/72A.
FIGURE 2-3: DIRECT/INDIRECT ADDRESSING
RP1:RP0
(1)
Direct Addressing
6
from opcode
0
bank select location select
00
00h
01
80h
10
100h
Indirect Addressing
IRP
7
(1)
FSR register
0
11
180h
bank select
location select
Data
Memory
not used
(2)
(2)
7Fh
FFh
17Fh
1FFh
Bank 0 Bank 1 Bank 2 Bank 3
Note 1: Maintain clear for upward compatibility with future products.
2: Not implemented.
DS35008B-page 18
Preliminary
© 1999 Microchip Technology Inc.

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