PIC16C781-ISO 查看數據表（PDF） - Microchip Technology

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PIC16C781-ISO

8-Bit CMOS Microcontrollers with A/D, D/A, OPAMP, Comparators and PSMC

Microchip Technology 

PIC16C781/782

2.2.1

GENERAL PURPOSE REGISTER

FILE

The register file can be accessed either directly, or indi-

rectly, through the File Select Register (FSR).

2.2.2 SPECIAL FUNCTION REGISTERS

The Special Function Registers are registers used by

the CPU and Peripheral Modules for controlling the

desired operation of the device. These registers are

implemented as static RAM. A list of these registers is

given in Table 2-1.

TABLE 2-1: PIC16C781/782 SPECIAL FUNCTION REGISTER SUMMARY

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on: Details on

POR, BOR Page:

Bank 0

00h(2)

01h

02h(2)

03h(2)

04h(2)

05h

06h

07h

08h

09h

0Ah(1, 2)

0Bh(2)

0Ch

0Dh

0Eh

0Fh

INDF

TMR0

PCL

STATUS

FSR

PORTA

PORTB

—

—

—

PCLATH

INTCON

PIR1

—

TMR1L

TMR1H

Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000

23

Timer0 Module’s Register

xxxx xxxx

51

Program Counter's (PC) Least Significant Byte

0000 0000

23

IRP

RP1

RP0

TO

PD

Z

DC

C

0001 1xxx

17

Indirect Data Memory Address Pointer

xxxx xxxx

23

RA7

RA6

RA5

RA4

RA3

RA2

RA1

RA0 xxxx 0000

26

RB7

RB6

RB5

RB4

RB3

RB2

RB1

RB0 xxxx 0000

35

Unimplemented

—

—

Unimplemented

—

—

Unimplemented

—

—

—

—

— Write Buffer for the upper 5 bits of the Program Counter

---0 0000

23

GIE

PEIE

T0IE

INTE

RBIE

T0IF

INTF

RBIF 0000 000x

19

LVDIF ADIF

C2IF

C1IF

—

—

—

TMR1IF 0000 ---0

21

Unimplemented

—

—

Holding register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx

55

Holding register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx

55

10h

T1CON

— TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON -000 0000

57

11h

—

Unimplemented

—

—

12h

—

Unimplemented

—

—

13h

—

Unimplemented

—

—

14h

—

Unimplemented

—

—

15h

—

Unimplemented

—

—

16h

—

Unimplemented

—

—

17h

—

Unimplemented

—

—

18h

—

Unimplemented

—

—

19h

—

Unimplemented

—

—

1Ah

—

Unimplemented

—

—

1Bh

—

Unimplemented

—

—

1Ch

—

Unimplemented

—

—

1Dh

—

Unimplemented

—

—

1Eh

ADRES

ADC Result Register

xxxx xxxx

71

1Fh

ADCON0

ADCS1 ADCS0 CHS2

CHS1

CHS0 GO/DONE CHS3

ADON 0000 0000

70

Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0'.

Shaded locations are unimplemented, read as ‘0’.

Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents are trans-

ferred to the upper byte of the program counter. See Section 2.9 for more detail.

2: These registers can be addressed from any bank.

 2001-2013 Microchip Technology Inc.

Preliminary

DS41171B-page 13

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