LTC1196 查看數據表（PDF） - Linear Technology

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LTC1196

8-Bit, SO-8, 1Msps ADCs with Auto-Shutdown Options

Linear Technology 

LTC1196/LTC1198

APPLICATIONS INFORMATION

Offset with Reduced VREF

The offset of the LTC1196 has a larger effect on the output

code when the ADC is operated with reduced reference

voltage. The offset (which is typically a fixed voltage)

becomes a larger fraction of an LSB as the size of the

LSB is reduced. The typical curve of Unadjusted Offset

Error vs Reference Voltage shows how offset in LSBs is

related to reference voltage for a typical value of VOS. For

example, a VOS of 2mV which is 0.1LSB with a 5V refer-

ence becomes 0.5LSB with a 1V reference and 2.5LSB

with a 0.2V reference. If this offset is unacceptable, it

can be corrected digitally by the receiving system or by

offsetting the “–” input of the LTC1196.

Noise with Reduced VREF

The total input referred noise of the LTC1196 can be

reduced to approximately 2mVP-P using a ground plane,

good bypassing, good layout techniques and minimizing

noise on the reference inputs. This noise is insignificant

with a 5V reference but will become a larger fraction of

an LSB as the size of the LSB is reduced.

For operation with a 5V reference, the 2mV noise is only

0.1LSB peak-to-peak. In this case, the LTC1196 noise

will contribute virtually no uncertainty to the output code.

However, for reduced references, the noise may become

a significant fraction of an LSB and cause undesirable jit-

ter in the output code. For example, with a 1V reference,

this same 2mV noise is 0.5LSB peak-to-peak. This will

reduce the range of input voltages over which a stable

output code can be achieved by 1LSB. If the reference is

further reduced to 200mV, the 2mV noise becomes equal

to 2.5LSB and a stable code is difficult to achieve. In this

case averaging readings is necessary.

This noise data was taken in a very clean setup. Any setup

induced noise (noise or ripple on VCC, VREF or VIN) will

add to the internal noise. The lower the reference voltage

to be used, the more critical it becomes to have a clean,

noise-free setup.

DYNAMIC PERFORMANCE

The LTC1196/LTC1198 have exceptionally high speed

sampling capability. Fast Fourier Transform (FFT) test

techniques are used to characterize the ADC’s frequency

response, distortion and noise at the rated throughput. By

applying a low distortion sine wave and analyzing the digital

output using a FFT algorithm, the ADC’s spectral content

can be examined for frequencies outside the fundamental.

Figure 10 shows a typical LTC1196 FFT plot.

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

0

VCC = 5V

fIN = 29kHz

fSMPL = 882kHz

100 200 300 400 500

FREQUENCY (kHz)

1196/98 G25

Figure 10. LTC1196 Non-Averaged, 4096 Point FFT Plot

Signal-to-Noise Ratio

The Signal-to-Noise plus Distortion Ratio [S/(N + D)] is

the ratio between the RMS amplitude of the fundamental

input frequency to the RMS amplitude of all other frequency

components at the ADC’s output. The output is band limited

to frequencies above DC and below one half the sampling

frequency. Figure 10 shows a typical spectral content with

a 882kHz sampling rate.

Effective Number of Bits

The Effective Number of Bits (ENOBs) is a measurement

of the resolution of an ADC and is directly related to

S/(N + D) by the equation:

N = [S/(N + D) –1.76]/6.02

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