VE28F008-95 查看數據表（PDF） - Intel

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VE28F008-95

8 MBIT (1 MBIT x 8) FLASH MEMORY

Intel 

VE28F008

Bus

Operation

Write

Command

Comments

Byte Write Data e 40H (10H)

Setup Address e Byte to be written

Write

Byte Write Data to be written

Address e Byte to be written

271305 – 4

FULL STATUS CHECK PROCEDURE

Standby Read

Repeat for subsequent bytes

Check RY BY

VOH e Ready VOL e Busy

or

Read Status Register

Check SR 7

1 e Ready 0 e Busy

Toggle OE or CE to update

Status Register

Full status check can be done after each byte or after a

sequence of bytes

Write FFH after the last byte write operation to reset the

device to Ready Array Mode

Bus

Operation

Optional

Read

Command

Comments

CPU may already have read

Status Register data in WSM

Ready polling above

Standby

Check SR 3

1 e VPP Low Detect

271305 – 5

Standby

Check SR 4

1 e Byte Write Error

SR 3 MUST be cleared if set during a byte write attempt

before further attempts are allowed by the Write State

Machine

SR 4 is only cleared by the Clear Status Register Command

in cases where multiple bytes are written before full status is

checked

If error is detected clear the Status Register before

attempting retry or other error recovery

Figure 5 Automated Byte Write Flowchart

12

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