PSD835G2-70UIT 查看數據表（PDF） - STMicroelectronics

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PSD835G2-70UIT

Flash PSD, 3 V supply, for 8-bit MCUs 4 Mbit + 256 Kbit dual Flash memories and 64 Kbit SRAM

STMicroelectronics 

Description

PSD835G2V

1.2.1

1.2.2

1.2.3

Simultaneous read and write to Flash memory

How can the MCU program the same memory from which it is executing code? It cannot.

The PSD allows the MCU to operate the two Flash memory blocks concurrently, reading

code from one while erasing and programming the other during IAP.

Complex memory mapping

How can I map these two memories efficiently? A programmable Decode PLD (DPLD) is

embedded in the PSD. The concurrent PSD memories can be mapped anywhere in MCU

address space, segment by segment with extremely high address resolution. As an option,

the secondary Flash memory can be swapped out of the system memory map when IAP is

complete. A built-in page register breaks the MCU address limit.

Separate Program and Data space

How can I write to Flash memory while it resides in Program space during field firmware

updates? My 80C51 will not allow it. The PSD provides means to reclassify Flash memory

as Data space during IAP, then back to Program space when complete.

1.3

PSDsoft

PSDsoft, a software development tool from ST, guides you through the design process step-

by-step making it possible to complete an embedded MCU design capable of ISP/IAP in just

hours. Select your MCU and PSDsoft takes you through the remainder of the design with

point and click entry, covering PSD selection, pin definitions, programmable logic inputs and

outputs, MCU memory map definition, ANSI-C code generation for your MCU, and merging

your MCU firmware with the PSD design. When complete, two different device programmers

are supported directly from PSDsoft: FlashLINK (JTAG) and PSDpro.

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