PT6524LQ 查看數據表（PDF） - Princeton Technology

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PT6524LQ

LCD Driver IC

Princeton Technology 

PT6524

ABSOLUTE MAXIMUM RATING

(Unless otherwise stated, Ta=25℃, Vss=0V)

Parameter

Symbol

Condition

Rating

Unit

Maximum Supply Voltage

VDDmax

VDD

-0.3 to +7.0

V

Input Voltage

VIN1

VIN2

CE, CLK, DI, /INH

OSC, VDD1, VDD2

-0.3 to +7.0

V

-0.3 to VDD+0.3

V

Output Voltage

VOUT

OSC, SG1 to SG51,

COM1 to COM4, P1 to P12

-0.3 to VDD+0.3

V

Output Current

IOUT1

IOUT2

SG1 to SG51

COM1 to COM4

300

µA

3

mA

Allowable Power Dissipation

IOUT3

PDmax

P1 to P12

Ta=85℃

5

mA

200

mW

Operating Temperature

Topr

-

-40 to +85

℃

Storage Temperature

Tstg

-

-65 to +150

℃

ALLOWABLE OPERATING RANGE

(Unless otherwise stated, Ta=25℃, Vss=0V)

Parameter

Supply Voltage

Symbol

VDD

Condition

VDD

Min.

3.0

Typ.

-

Max.

Unit

6.0

V

Input Voltage

VDD1

VDD2

VDD1

VDD2

-

2/3VDD

VDD

V

-

1/3VDD

VDD

V

High Level Input Voltage

VIH

CE, CLK, DI, /INH

0.8VDD

-

6.0

V

Low Level Input Voltage

VIL

CE, CLK, DI, /INH

0

-

0.2VDD

V

Recommended External

Resistance

Rosc

OSC

-

270

-

KΩ

Recommended External

Capacitance

Cosc

OSC

-

100

-

pF

Guaranteed Oscillation

Range

fosc

OSC

25

50

100

KHz

Data Setup Time

tds

CLK, DI (see Note)

160

-

-

ns

Data Hold Time

tdh

CLK, DI (see Note)

160

-

-

ns

CE Wait Time

tcp

CE, CLK (see Note)

160

-

-

ns

CE Setup Time

tcs

CE, CLK (see Note)

160

-

-

ns

CE Hold Time

tch

CE, CLK (see Note)

160

-

-

ns

High Level Clock Pulse

Width

tΦH

CLK (see Note)

160

-

-

ns

Low Level Clock Pulse

Width

tΦL

CLK, (see Note)

160

-

-

ns

Rise Time

tr

CE, CLK, DI (see Note)

-

160

-

ns

Fall Time

/INH Switching Time

tf

CE, CLK, DI (see Note)

-

160

-

ns

tc

/INH, CE (see Note)

10

-

-

µs

V1.3

18

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