DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

S1R72U16 查看數據表(PDF) - Seiko Epson Corp

零件编号
产品描述 (功能)
生产厂家
S1R72U16 Datasheet PDF : 37 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
6. Pin Functions
6.2 CPU Mode
CPU memory bus I/F (IOVDD system)
BGA QFP
Name
I/O
RESET
Details
D8
54
CA2
D6
52
CA1
D5
51
CA0
E6
50
XCS
E7
49
CA3
J6
33
XRD
G5
31
XWR
H5
30
XDREQ
J5
29
XDACK
H6
32
-
F5
28
XINT
E9
48
XHRESET
E8
47
-
F7
46
-
F9
45
CSEL
D7
55
CD15
C9
56
CD14
C8
57
CD13
C7
58
CD12
B8
59
CD11
A8
61
CD10
B7
62
CD9
A7
63
CD8
C6
64
CD7
B6
65
CD6
C5
67
CD5
B5
68
CD4
A5
69
CD3
D4
70
CD2
C4
71
CD1
B4
72
CD0
IN
IN
IN
IN
IN
IN
IN
OUT
IN
OUT(PU)
OUT
IN
BI(PU)
BI(PU)
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
-
-
-
-
-
-
-
High
-
Hi-z
High
-
Hi-z
Hi-z
-
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Address
Chip selection
Address
Read strobe
Write strobe
DMA transfer request
DMA transfer acknowledge
Not used (*)
Interrupt request
Bus reset
Not used (*)
Not used (*)
Drive selection
Data bus
PU: Using pull-up I/O
* Set to open or pull-up. LSI internal pull-up resistor is enabled in CPU mode.
For detailed information on pins other than those described above, see “6.1 IDE Mode”.
S1R72U16 Data Sheet (Rev. 2.00)
EPSON
11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]