ATSAM3U1C 查看數據表（PDF） - Atmel Corporation

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ATSAM3U1C

AT91SAM ARM-based Flash MCU

Atmel Corporation 

SAM3U Series

9. Memories

The embedded and external memories are described below.

9.1 Embedded Memories

9.1.1

Internal SRAM

The SAM3U4 (256 KBytes internal Flash version) embeds a total of 48 Kbytes high-speed

SRAM (32 Kbytes SRAM0 and 16 Kbytes SRAM1).

The SAM3U2 (128 KBytes internal Flash version) embeds a total of 32 Kbytes high-speed

SRAM (16 Kbytes SRAM0 and 16 Kbytes SRAM1).

The SAM3U1 (64 KBytes internal Flash version) embeds a total of 16 Kbytes high-speed SRAM

(8 Kbytes SRAM0 and 8 Kbytes SRAM1).

The SRAM0 is accessible over System Cortex-M3 bus at address 0x2000 0000 and SRAM1 at

address 0x2008 0000. The user can see the SRAM as contiguous at 0x20078000-0x20083FFF

(SAM3U4), 0x2007C000-0x20083FFFF (SAM3U2) or 0x2007E000-0x20081FFFF (SAM3U1).

The SRAM0 and SRAM1 are in the bit band region. The bit band alias region is from 0x2200

0000 and 0x23FF FFFF.

The NAND Flash Controller embeds 4224 bytes of internal SRAM. If the NAND Flash controller

is not used, these 4224 bytes of SRAM can be used as general purpose. It can be seen at

address 0x2010 0000.

9.1.2

Internal ROM

The ATSAM3U4/2/1 product embeds an Internal ROM, which contains the SAM-BA Boot and

FFPI program.

At any time, the ROM is mapped at address 0x0018 0000.

9.1.3 Embedded Flash

9.1.3.1

Flash Overview

The Flash of the SAM3U4 (256 KBytes internal Flash version) is organized in two banks of 512

pages (dual plane) of 256 bytes.

The Flash of the SAM3U2 (128 KBytes internal Flash version) is organized in one bank of 512

pages (single plane) of 256 bytes.

The Flash of the SAM3U1 (64 KBytes internal Flash version) is organized in one bank of 256

pages (single plane) of 256 bytes.

The Flash contains a 128-byte write buffer, accessible through a 32-bit interface.

9.1.3.2

9.1.3.3

Flash Power Supply

The Flash is supplied by VDDCORE.

Enhanced Embedded Flash Controller

The Enhanced Embedded Flash Controller (EEFC) manages accesses performed by the mas-

ters of the system. It enables reading the Flash and writing the write buffer. It also contains a

User Interface, mapped within the Memory Controller on the APB.

31

6430F–ATARM–21-Feb-12

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