SCN2652AC2A44 查看數據表（PDF） - Philips Electronics

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SCN2652AC2A44

Multi-protocol communications controller(MPCC)

Philips Electronics 

Philips Semiconductors

Multi-protocol communications controller (MPCC)

Product specification

SCN2652/SCN68652

Table 8.

BIT

00–07

08

09

10

11

12–14

15

Receiver Data/Status Register (RDSR)–(Read Only)

NAME

MODE

FUNCTION

RxDB

BOP/BCP

Receiver data buffer. Contains assembled characters from the RxSR. If VRC is specified, the

parity bit is stripped.

RSOM

BOP

Receiver start of message = 1 when a FLAG followed by a non-FLAG has been received and

the latter character matches the secondary station if SAM = 1. RxA will be asserted when

RSOM = 1. RSOM resets itself after one character time and has no affect on RxSA.

REOM

RAB/GA

BOP

BOP

Receiver end of message = 1 when the closing FLAG is detected and the last data character

is loaded into RxDB or when an ABORT/GA character is received. REOM is cleared on

reading RDSRH, reset operation, or dropping of RxE.

Received ABORT or GA character = 1 when the receiver senses an ABORT character if

SS/GA = 0 or a GA character if SS/GA = 1. RAB/GA is cleared on reading RDSRH, reset

operation, or dropping of RxE. A received abort does not set RxDA.

ROR

ABC

RERR

BOP/BCP

BOP

BOP/BCP

Receiver overrun = 1 indicates the processor has not read last character in the RxDB within

one character time + 1/2 RxC period after RxDA is asserted. Subsequent characters will be

lost. ROR is cleared on reading RDSRH, reset operation, or dropping of RxE.

Assembled bit count. Specifies the number of bits in the last received data character of a

message and should be examined by the processor when REOM = 1(RxDA and RxSA

asserted). ABC = 0 indicates the message was terminated (by a flag or GA) on a character

boundary as specified by PCR8–10. Otherwise, ABC = number of bits in the last data

character. ABC is cleared when RDSRH is read, reset operation, or dropping RxE. The

residual character is right justified inRDSRL.

Receiver error indicator should be examined by the processor when REOm = 1 in BOP, or

when the processor determines the last data character of the message in BCP with CRC or

when RxSA is set in BCP with VRC.

CRC–CCITT preset to 1’s/0’s as specified by PCSAR8–10:

RERR = 1 indicates FCS error (CRC ≠ F0B8 or ≠ 0)

RERR = 0 indicates FCS received correctly (CRC = F0B8 or = 0)

CRC–16 preset to 0’s on 8-bit characters specified by PSCAR8–10:

RERR = 1 indicates CRC–16 received correctly (CRC = 0).

RERR = 0 indicates CRC–16 error (CRC≠0)

VRC specified by PCSAR8–10:

RERR = 1 indicates VRC error

RERR = 0 indicates VRC is correct.

DC ELECTRICAL CHARACTERISTICS1, 2

PARAMETER

Input voltage

VIL

Low

VIH

High

Output voltage

VOL

VOH

Low

High

ICC

Power supply current

Leakage current

IIL

Input

IOL

Output

Capacitance

CIN

COUT

Input

Output

TEST CONDITIONS

IOL = 1.6mA

IOH = –100µA

VCC = 5.25V, TA = 0°C

VIN = 0 to 5.25V

VOUT = 0 to 5.25V

VIN = 0V, f = 1MHz

VOUT = 0V, f = 1MHz

LIMITS

Min

Typ

Max

0.8

2.0

0.4

2.4

150

10

10

20

20

UNIT

V

V

mA

µA

pF

1995 May 01

16

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