SM5849BF 查看數據表（PDF） - Nippon Precision Circuits
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SM5849BF Datasheet PDF : 25 Pages
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SM5849BF
Attenuation (MDT, MCK, MLEN)
The digital attenuator coefficients are read in as serial data on the microcontroller interface. Data on MDT is
read into the internal shift register on the rising edge of MCK, and then 12 bits are latched internally on the ris-
ing edge of MLEN.
When the leading bit is 0 (D1 = LOW), the following 11 bits are read into the attenuation register and used as
an unsigned integer in MSB first format. See figure 3.
MLEN
MMCD;;;;;;KT ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D1212;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
MSB
LSB
"L"
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
Figure 3. Attenuation data format (microcontroller interface)
Although the attenuation data comprises 11 bits, only 1025 levels are valid as given by the following.
10
Σ DATT = ai × 2 (10 − i)
i=0
The gain of the attenuator for values of DATT from 001H to 400H are given by the following equations. Note
that when the F12DB flag is HIGH, the gain is shifted by a fixed +12.0412dB.
Gain = 20 × log DATT [dB]
1024
when F12DB = LOW
= 20 × log DATT [dB]
256
when F12DB = HIGH
After a system reset initialization, DATT is set to 400H and the F12DB flag is LOW, corresponding to 0dB
gain. (The F12DB flag is described in table 3.)
Table 6. Attenuator settings
D1
Attenuation data
DATT
F12DB = LOW (default)
Gain [dB]
Linear expression
F12DB = HIGH
Gain [dB]
Linear expression
000H
−∞
0.0
−∞
0.0
001H
−60.206
1/1024
−48.165
1/256
↓
↓
↓
↓
↓
LOW
100H
−12.041
256/1024
0.0
256/256
↓
↓
↓
↓
↓
3FFH
−0.0085
1023/1024
12.032
1023/256
400H (to 7FFH)
0
1.0
12.041
4.0
SEIKO NPC CORPORATION —15
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