MX829 查看數據表（PDF） - MX-COM Inc

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MX829

Baseband Signal Processor

MX-COM Inc  

Baseband Signal Processor

16

MX829 PRELIMINARY INFORMATION

5.4.2 Checking

The checksum checker performs two tasks:

It takes the first n-1 bits of a received (n = 8m + 16 bits) message, inverts bit n-1, and divides them modulo-2, by the

generating polynomial:

X15 + X14 + X13 + X11 + X4 + X2 + 1

The 15 bits remaining in the polynomial divider are checked for all zero.

Secondly, it generates an EVEN parity bit from the first n-1 bits of a received message and compares this bit with the

received parity bit (bit n). See Figure 6.

If the 15 bits in the polynomial divider are all zero, and the two parity bits are equal, then the RXSUMF bit (STATUS

register bit 6) is set. This is updated and latched every 8 bits, starting at the bit immediately after the initialization of the bit

counter. This initialization takes place on detection of frame synchronization, i.e. the matching of received data to the

SYNC, SYNT or RX SYNC WORD.

Note that the checksum is calculated on the received data before it is double buffered (see Figure 4).

n = the number of bits in the received message

m = the number of bytes of transmitted data, excluding checksum

m x 8 bits

n - 1 bits

invert last bit

15-bit

remainder

P

parity

(bit n)

transmitted

received

generate EVEN

parity bit

÷ polynomial

15-bit remaining in

divider all zero?

same as parity?

YES

YES

AND

CHECKSUM OK

Figure 6: Checksum Checking

© 1998 MX•COM Inc.

www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054

Doc. # 20480160.004

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