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SST32HF1621C 查看數據表(PDF) - Silicon Storage Technology

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产品描述 (功能)
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SST32HF1621C
SST
Silicon Storage Technology SST
SST32HF1621C Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Multi-Purpose Flash Plus + SRAM ComboMemory
SST32HF1641 / SST32HF1681 / SST32HF3241 / SST32HF3281
SST32HF1621C / SST32HF1641C / SST32HF3241C
Preliminary Specifications
TABLE 3: PIN DESCRIPTION
Symbol Pin Name
Functions
AMS1 to A0 Address Inputs
To provide flash address, AMS-A0.
To provide SRAM address, AMS-A0
DQ15-DQ0 Data Inputs/Outputs
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a flash Erase/Program cycle. The outputs are in
tri-state when OE# is high or BES1# is high or BES2 is low and BEF# is high.
BEF#
Flash Memory Bank Enable To activate the Flash memory bank when BEF# is low
BES1# SRAM Memory Bank Enable To activate the SRAM memory bank when BES1# is low
BES2
SRAM Memory Bank Enable To activate the SRAM memory bank when BES2 is high
OEF#2
Output Enable
To gate the data output buffers for Flash2 only
OES#2
Output Enable
To gate the data output buffers for SRAM2 only
WEF#2 Write Enable
To control the Write operations for Flash2 only
WES#2 Write Enable
To control the Write operations for SRAM2 only
OE#
Output Enable
To gate the data output buffers
WE#
Write Enable
To control the Write operations
UBS#
LBS#
WP#
Upper Byte Control (SRAM)
Lower Byte Control (SRAM)
Write Protect
To enable DQ15-DQ8
To enable DQ7-DQ0
To protect and unprotect sectors from Erase or Program operation
RST#
Reset
To Reset and return the device to Read mode
VSSF2
VSSS2
Ground
Ground
Flash2 only
SRAM2 only
VSS
VDDF
VDDS
NC
Ground
Power Supply (Flash)
Power Supply (SRAM)
No Connection
2.7-3.3V Power Supply to Flash only
2.7-3.3V Power Supply to SRAM only
Unconnected pins
1. AMS = Most Significant Address
AMS = A19 for SST32HF16x1x and A20 for SST32HF32x1x
2. LS package only
T3.3 1236
©2005 Silicon Storage Technology, Inc.
8
S71236-04-000
5/05

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