ST72F521M9T3 查看數據表（PDF） - STMicroelectronics

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ST72F521M9T3

80/64-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72F521, ST72521B

column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,

else the configuration is floating interrupt input.

2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to VDD

are not implemented). See See “I/O PORTS” on page 47. and Section 12.8 I/O PORT PIN CHARACTER-

ISTICS for more details.

3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil-

lator; see Section 1 INTRODUCTION and Section 12.5 CLOCK AND TIMING CHARACTERISTICS for

more details.

4. On the chip, each I/O port may have up to 8 pads. Pads that are not bonded to external pins are in input

pull-up configuration after reset. The configuration of these pads must be kept at reset state to avoid add-

ed current consumption.

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