STE2004DIE2 查看數據表（PDF） - STMicroelectronics
零件编号
产品描述 (功能)
生产厂家
STE2004DIE2 Datasheet PDF : 66 Pages
| |||
STE2004
Figure 8. Automatic data RAM writing sequence with V=0 and Data RAM Normal Format (MX=0)1
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
0123
98 99 100 101
LR0049
Figure 9. Automatic data RAM writing sequence with V=1 and Data RAM Normal Format (MX=0)1
0123
BANK 0
) BANK 1
BANK 2
t(s BANK 3
BANK 4
c BANK 5
u BANK 6
d BANK 7
ro BANK 8
98 99 100 101
LR0050
te P Figure 10. Automatic data RAM writing sequence with V=0 and Data RAM Mirrored Format (MX=1)1
bsole BANK 0
BANK 1
O BANK 2
- BANK 3
) BANK 4
BANK 5
t(s BANK 6
BANK 7
duc BANK 8
101 100 99 98
3210
LR0051
Pro Figure 11. Automatic data RAM writing sequence with V=1 and Data RAM Mirrored Format (MX=1)1
oleteBANK 0
s BANK 1
b BANK 2
O BANK 3
101 100 99 98
3210
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
LR0052
1. X Carriage=101; Y-Carriage = 8
11/66
Share Link: 