Running the detection mode
9
Running the detection mode
STP08CDC596
9.1
Phase one: “entering in detection mode“
From the “Normal Mode” condition the device can switch to the “Error Mode“ by a logic
sequence on the OE/DM2 and LE/DM1 pins as showed in the following table and diagram:
Table 8. Entering in detection truth table
CLK
1°
2°
3°
4°
5°
OE/DM2
H
L
H
H
H
) LE/DM1
L
L
L
H
L
ct(s Table 9. Entering in detection timing diagram
Productt((ss)) -- OObbssoolleettee PPrroodduuct(s) After these five CLK cycles the device goes into the “Error Detection Mode“ and at the 6th
OObbssoolleettee Produc rise front of CLK the SDI data are ready for the sampling.
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