FX602 查看數據表（PDF） - CML Microsystems Plc

零件编号

产品描述 (功能)

生产厂家

FX602

Calling line identifier

CML Microsystems Plc 

Calling Line Identifier

FX602

FSK Receiver

Transmission rate

V23 Mark (logical 1) frequency

V23 Space (logical 0) frequency

Bell202 Mark (logical 1) frequency

Bell202 Space (logical 0) frequency

Valid input level range

Acceptable twist (mark level wrt space level)

V23

Bell202

Acceptable Signal to Noise ratio

V23

Bell202

Level Detector 'on' threshold level

Level Detector 'off' to 'on' time (Fig 4 Teon)

Level Detector 'on' to 'off' time (Fig 4 Teoff)

Input Signal Amplifier

Input impedance

Voltage gain

XTAL Input

'High' pulse width

'Low' pulse width

Notes Min.

1188

1280

2068

1188

2178

4

-40.0

-7.0

-10.0

5

20.0

5

30.0

4

8.0

7

10.0

8

100

8

100

Typ.

Max. Units

1200

1300

2100

1200

2200

1212

1320

2132

1212

2222

-8.0

+7.0

+10.0

-40.0

25.0

Baud

Hz

Hz

Hz

Hz

dBV

dB

dB

dB

dB

dBV

msec

msec

MΩ

500

V/V

ns

ns

Notes:

1. At 25°C, not including any current drawn from the FX602 pins by external circuitry other than

X1, C1 and C2.

2. RD, MODE, RXCK inputs at VSS, ZP input at VDD. See also Figure 11.

3. All conditions must be met to ensure detection.

4. For VDD= 5.0V with equal level tones and with the input signal amplifier external components

as section 1.4. The internal threshold levels are proportional to VDD. To cater for other supply

voltages or different signal level ranges the voltage gain of the input signal amplifier should be

adjusted by selecting the appropriate external components as described in section 1.5

5. Flat noise in 300-3400Hz band for V23, 200 - 3200Hz for Bell202.

6. Meeting any of these conditions will ensure non-detection.

7. Open loop, small signal low frequency measurements.

8. Timing for an external input to the CLOCK/XTAL pin.

© 1998 Consumer Microcircuits Limited

26

D/602/7

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