T405-700H-TR 查看數據表（PDF） - STMicroelectronics
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T405-700H-TR Datasheet PDF : 10 Pages
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T4 Series
Figure 7: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width tp < 10 ms
and corresponding value of I2t
Figure 8: Relative variation of gate trigger
current, holding current and latching current
versus junction temperature (typical values)
ITSM(A), I2t (A2s)
500
100
dI/dt limitation:
50A/µs
Tj initial=25°C
ITSM
10
1
0.01
tp(ms)
0.10
1.00
I2t
10.00
IGT,IH,IL[Tj] / IGT,IH,IL[Tj=25°C]
2.5
2.0
IGT
1.5
IH & IL
1.0
0.5
Tj(°C)
0.0
-40 -20
0
20
40
60
80 100 120 140
Figure 9: Relative variation of critical rate of
decrease of main current versus (dV/dt)c
(typical values)
Figure 10: Relative variation of critical rate of
decrease of main current versus junction
temperature
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
2.4
(dI/dt)c [Tj] / (dI/dt)c [Tj specified]
6
2.2
2.0
5
1.8
1.6
4
1.4
1.2
T435
3
1.0
0.8
2
T410
0.6
T405
0.4
1
0.2
0.0
0.1
(dV/dt)c (V/µs)
1.0
10.0
Tj(°C)
0
100.0
0
25
50
75
100
125
Figure 11: DPAK thermal resistance junction to
ambient versus copper surface under tab (printed
circuit board FR4, copper thickness: 35 µm)
Rth(j-a)(°C/W)
100
90
80
70
60
50
40
30
20
10
S(cm²)
0
0
4
8
12
16
20
24 28 32
36
40
5/10
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