N80L52 查看數據表（PDF） - Intel
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N80L52 Datasheet PDF : 20 Pages
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8XL52 54 58
SERIAL PORT TIMING - SHIFT REGISTER MODE
Test Conditions Over Operating Conditions Load Capacitance e 80 pF
Symbol
Parameter
12 MHz
Oscillator
Min Max
20 MHz
Oscillator
Min Max
Variable
Oscillator
Min
Max
TXLXL Serial Port Clock
1
Cycle Time
0 600
12 TCLCL
TQVXH Output Data Setup to 700
367
10 TCLCL b 133
Clock Rising Edge
TXHQX Output Data Hold
after Clock Rising
Edge
8XL5X
50
2 TCLCL b 117
8XL5X-20
50
2 TCLCL b 50
TXHDX Input Data Hold After 0
0
0
Clock Rising Edge
TXHDV Clock Rising Edge to
700
367
Input Data Valid
10 TCLCL b 133
Units
ms
ns
ns
ns
ns
ns
SHIFT REGISTER MODE TIMING WAVEFORMS
272468 – 14
14
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