TDA18250HN/C1(2010) 查看數據表（PDF） - NXP Semiconductors.

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TDA18250HN/C1
(Rev.:2010)

Cable Silicon Tuner

NXP Semiconductors. 

NXP Semiconductors

5. Block diagram

TDA18250HN

Cable Silicon Tuner

3

RF_IN

AGC1

46

LT

AGC2

LEVEL

CONTROL

RF

IF

IF

SELECTIVITY mixer SELECTIVITY AGC 31

30

32

IFO_P

IFO_N

VIFAGC

TDA18250HN

I2C-BUS

INTERFACE

22 35

36

AS SCL

SDA

Fig 1. Block diagram

SYNTHESIZER

14

15

VTLO CPLO

CRYSTAL

OSCILLATOR

16

17

XTAL_P XTAL_N

19

XTO_P

20 XTO_N

001aam176

6. Limiting values

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

Conditions

Min

VCC

supply voltage

−0.3

VI

input voltage

VCC < 3.3 V

−0.3

VCC > 3.3 V

−0.3

Tstg

storage temperature

−40

Tj

junction temperature

-

VESD

electrostatic discharge EIA/JESD22-A114 (HBM)

2

voltage

EIA/JESD22-C101-C (FCDM) [1] 1.5

[1] It withstands class IV of JEDEC standard.

Max

Unit

+3.60

V

VCC + 0.3 V

+3.6

V

+150

°C

115

°C

-

kV

-

kV

7. Abbreviations

Table 4. Abbreviations

Acronym

Description

AGC

Automatic Gain Control

BOM

Bill Of Materials

FCDM

Field Charge Device Model

HBM

Human Body Model

IC

Integrated Circuit

IF

Intermediate Frequency

TDA18250HN_SDS

Objective data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 12 August 2010

© NXP B.V. 2010. All rights reserved.

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