TDA7492MV 查看數據表（PDF） - STMicroelectronics
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TDA7492MV Datasheet PDF : 26 Pages
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Applications information
TDA7492MV
6.5
6.5.1
6.5.2
Internal and external clocks
The clock of the class-D amplifier can be generated internally or can be driven by an
external source.
If two or more class-D amplifiers are used in the same system, it is recommended that all
devices operate at the same clock frequency. This can be implemented by using one
TDA7492MV as master clock, while the other devices are in slave mode (that is, externally
clocked. The clock interconnect is via pin SYNCLK of each device. As explained below,
SYNCLK is an output in master mode and an input in slave mode.
Master mode (internal clock)
Using the internal oscillator, the output switching frequency, fSW, is controlled by the
resistor, ROSC, connected to pin ROSC:
fSW = 106 / ((16 * ROSC + 182) * 4) kHz
where ROSC is in kΩ.
In master mode, pin SYNCLK is used as a clock output pin, whose frequency is:
fSYNCLK = 2 * fSW
For master mode to operate correctly then resistor ROSC must be less than 60 kΩ as given
below in Table 9.
Slave mode (external clock)
In order to accept an external clock input the pin ROSC must be left open, that is, floating.
This forces pin SYNCLK to be internally configured as an input as given in Table 9.
The output switching frequency of the slave devices is:
fSW = fSYNCLK / 2
Table 9.
Master
Slave
How to set up SYNCLK
Mode
ROSC
ROSC < 60 kΩ
Floating (not connected)
Output
Input
SYNCLK
Figure 25. Master and slave connection
Master
TDA7492xy
Slave
TDA7492MV
ROSC
SYNCLK
Output
SYNCLK
Input
ROSC
Cosc
100 nF
Rosc
39 kΩ
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Doc ID 16264 Rev 1
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