CXP80712B/80716B/80720B/80724B
Recommended Operating Conditions
(Vss = 0V)
Item
Symbol Min.
Max. Unit
Remarks
4.5
5.5
V
Guaranteed operation range for 1/2, 1/4
frequency dividing clock
Supply voltage
VDD
3.5
5.5
V
Guaranteed operation range for 1/16 frequency
dividing clock or during SLEEP mode.
2.7
5.5
V Guaranteed operation range by TEX clock
Analog power supply
HIgh level
input voltage
Low level
input voltage
AVDD
VIH
VIHS
VIHTS
VIHEX
VIL
VILS
VILTS
VILEX
2.5
5.5
V
Guaranteed data hold operation range
during STOP
4.5
5.5
V ∗1
0.7VDD
VDD
V ∗2
0.8VDD
VDD
V CMOS schmitt input∗3
2.2
VDD
V TTL schmitt input∗4
VDD – 0.4 VDD + 0.3 V EXTAL pin∗5 TEX pin∗6
0
0.3VDD V ∗2
0
0.2VDD V CMOS schmitt input∗3
0
0.8
V TTL schmitt input∗4
–0.3
0.4
V EXTAL pin∗5 TEX pin∗6
Operating temperature Topr
–20
+75 °C
∗1 AVDD and VDD should be set to the same voltage.
∗2 Normal input port (each pin of PC, PD, PE0, PE1, PF0 to PF3, PG, PI and PJ), MP pin.
∗3 Each pin of CS0, SI0, SCK0, RST, PE0/INT0, PE1/EC/INT2, PG (For PG4 and PG5, when CMOS schmitt
input is selected with mask option), PI1/RMC, PI4/INT1/NMI, PI5/SCK1 and PI7/SI1.
∗4 Each pin of PG4 and PG5 (When TTL schmitt input is selected with mask option)
∗5 Specifies only during external clock input.
∗6 Specifies only during event count clock input.
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