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TMC2250AKEC3 查看數據表(PDF) - Cadeka Microcircuits LLC.

零件编号
产品描述 (功能)
生产厂家
TMC2250AKEC3
CADEKA
Cadeka Microcircuits LLC. CADEKA
TMC2250AKEC3 Datasheet PDF : 23 Pages
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TMC2250A
PRODUCT SPECIFICATION
Pin Descriptions (continued)
Pin Number
Pin Name CPGA/PPGA/
MPGA
MQFP
Function
KA9-0
K13, J11, K12, 69, 68, 67, 66,
L13, L12, K11, 65, 64, 63, 62,
M13, M12,
61, 60
L11, N13
Coefficient
Input A1, A2,
A3
KB9-0
M11, L10, 59, 58, 57, 56,
N12, N11, 55, 54, 53, 52,
M10, L9, N10, 51, 50
M9, N9, L8
Coefficient
Input B1, B2,
B3
Pin Description
Data presented to the 10-bit registered coefficient
input ports KA, KB and KC are latched three at a time
into the internal coefficient storage register set
indicated by the Coefficient Write Enable CWE1,0 on
the next clock, as shown in Table 4.
KC9-0
M8, N8, N7, 49, 48, 47, 45, Coefficient
M7, N6, M6, 44, 43, 41, 40, Input B1, B2,
N5, M5, N4, L5 39, 38 B3
XC11-0
YC11-8
Y7-4
YC3-0
ZC11-0
B4, A3, A2, B3, 115, 116,
A1, C3, B2, B1, 117, 119,
D3, C2, C1, D2 120, 1, 2, 3, 4,
5, 6, 7
D1, E2, E1, F2 9, 10, 11, 13
F1, G2, G1, H1 14, 15, 17, 18
K1, J2, J1, H2 23, 22, 21, 19
M4, N3, M3,
N2, M2, L3,
N1, L2, K3,
M1, L1, K2
37, 36, 35, 33,
32, 31, 30, 29,
28, 27, 26, 25
CASIN15-4/
Output X
CASIN3-0/
Output Y11-0
Output7-4 only
CASOUT3-0/
Output Y3-0
CASOUT15-4/
Output Z11-0
In all modes except Mode 00, the x port and four bits
of the Y output port are reconfigured as the 16-bit
registered Cascade Input port CASIN15-0. Data
presented to this input will be added to the weighted
sums of the data words which were presented to the
input ports (A, B and C).
In the matrix multiply mode, data are available at the
12-bit registered output ports X, Y AND Z tDO after
every clock. These ports are reconfigured in the
filtering modes as 16-bit Cascade Input and Output
ports.CASOUT15-0
In all modes except Mode 00, the Z port and four bits
of the Y output port are reconfigured as the 16-bit
registered Cascade Output port CASOUT15-0.
Notes:
1. The output ports X, Y, Z and CASOUT, and input port CASIN are internally reconfigured by the device as required for each
mode of the device. The multiple-function pins have names which are combinations of these titles, as appropriate.
2. The output drivers on pins XC11-0 and YC11-8 are not necessarily disabled until after the first rising edge of CLK following
power-up. If these pins are to be tied to other output drivers, to each other, or to ground or VDD, the user should ensure that
a clock pulse arrives within a few seconds of power-up, to avoid bus contention.
Table 3. Conguration Mode Word
MODE1,0
00
Conguration Mode
3 x 3 Matrix Multiply
01
9-Tap One Dimensional FIR
10
3 x 3 -Pixel Convolver
11
4 x 2 -Pixel Convolver
Table 4. Coefcient Write Enable Word
CWE1,0
00
Coefcient Set Selected
Hold all registers
01
Update KA1, KB1, KC1
10
Update KA2, KB2, KC2
11
Update KA3, KB3, KC3
REV. 1.0.2 10/25/00
7

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