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TMP86FS49AIFG 查看數據表(PDF) - Toshiba

零件编号
产品描述 (功能)
生产厂家
TMP86FS49AIFG
Toshiba
Toshiba Toshiba
TMP86FS49AIFG Datasheet PDF : 296 Pages
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1.1 Features
TMP86FS49AIFG
8. 8-bit timer counter : 4 ch
- Timer, Event counter, Programmable divider output (PDO),
Pulse width modulation (PWM) output,
Programmable pulse generation (PPG) modes
9. 8-bit UART : 2 ch
10. High-Speed SIO: 2ch
11. Serial Bus Interface(I2C Bus): 1ch
12. 10-bit successive approximation type AD converter
- Analog input: 16 ch
13. Key-on wakeup : 4 ch
14. Clock operation
Single clock mode
Dual clock mode
15. Low power consumption operation
STOP mode: Oscillation stops. (Battery/Capacitor back-up.)
SLOW1 mode: Low power consumption operation using low-frequency clock.(High-frequency clock
stop.)
SLOW2 mode: Low power consumption operation using low-frequency clock.(High-frequency clock
oscillate.)
IDLE0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using high fre-
quency clock. Release by falling edge of the source clock which is set by TBTCR<TBTCK>.
IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interru-
puts(CPU restarts).
IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by inter-
ruputs. (CPU restarts).
SLEEP0 mode: CPU stops, and only the Time-Based-Timer(TBT) on peripherals operate using low fre-
quency clock.Release by falling edge of the source clock which is set by TBTCR<TBTCK>.
SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru-
put.(CPU restarts).
SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by
interruput.
16. Wide operation voltage:
4.5 V to 5.5 V at 16MHz /32.768 kHz
3.0 V to 5.5 V at 8 MHz /32.768 kHz
Page 2

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