TMP86FS27FG 查看數據表（PDF） - Toshiba

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TMP86FS27FG

CMOS 8-Bit Microcontroller

Toshiba 

TMP86FS27

Description of flash memory writing mode

1. The receive data in the 1st byte is the matching data. When the boot program starts in serial

PROM mode, TMP86FS27 (Mentioned as “device” hereafter) waits for the matching data

(5AH) to receive. Upon receiving the matching data, it automatically adjusts the UART’s

initial baud rate to 9,600bps.

2. When the device has received the matching data, the device transmits the data “5AH” as an

echo back to the controller. If the device can not receive the matching data, the device does not

transmit the echo back data and waits for the matching data again with changing baud rate.

Therefore, the controller should send the matching data continuously until the device

transmits the echo back data.

3. The receive data in the 3rd byte is the baud rate modification data. The six kinds of baud rate

modification data shown in Table 2.4.1 are available. Even if baud rate changing is no need,

be sure to send the initial baud rate data (28H: 9,600 bps). The changing of baud rate is

executed after transmitting the echo back data.

4. When the 3rd byte data is one of the baud rate modification data corresponding to the device's

operating frequency, the device sends the echo back data which is the same as received baud

rate modification data. Then the baud rate is changed. If the 3rd byte data does not

correspond to the baud rate modification data, the device stops UART function after sending

3 bytes of baud rate modification error code: (62H).

5. The receive data in the 5th byte is the command data (30H) to write the flash memory.

6. When the 5th byte is one of the operation command data shown in Table 2.5.1, the device

sends the echo back data which is the same as received operation command data (in this case,

30H). If the 5th byte data does not correspond to the operation command data, the device

stops UART function after sending 3 bytes of operation command error code: (63H).

7. The 7th byte is used as an upper bit (Bit15 to bit8) of the password count storage address.

When the receiving is executed correctly (No error), the device does not send any data. If the

receiving error or password error occur, the device does not send any data and stops UART

function.

8. The 9th byte is used as a lower bit (Bit7 to bit0) of the password count storage address. When

the receiving is executed correctly (No error), the device does not send any data. If the

receiving error or password error occur, the device does not send any data and stops UART

function.

9. The 11th byte is used as an upper bit (Bit15 to bit8) of the password comparison start

address. When the receiving is executed correctly (No error), the device does not send any

data. If the receiving error or password error occur, the device does not send any data and

stops UART function.

10. The 13th byte is used as a lower bit (Bit7 to bit0) of the password comparison start address.

When the receiving is executed correctly (No error), the device does not send any data. If the

receiving error or password error occur, the device does not send any data and stops UART

function.

11. The 15th through the m’th bytes are the password data. The number of passwords is the data

(N) indicated by the password count storage address. The password data are compared for N

entries beginning with the password comparison start address. The controller should send N

bytes of password data to the device. If the passwords do not match, the device stops UART

function without returning error code to the controller. If the data of vector addresses (FFE0H

to FFFFH) are all “FFH”, the comparison of passwords is not executed because the device is

considered as a blank product.

86FS27-14

2007-08-07

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